This book targets custom IC designers who are encountering variation issues in their designs, especially for modern process nodes at 45nm and below, such as statistical process variations, environmental variations, and layout effects. The authors have created a field guide to show how to handle variation proactively, and to understand the benefits of doing so. Readers facing variation challenges in their memory, standard cell, analog/RF, and custom digital designs will find easy-to-read, pragmatic solutions. Reviews the most important concepts in variation-aware design, including types of variables and variation, useful variation-aware design terminology, and an overview and comparison of high-level design flows. Describes and compares a suite of approaches and flows for PVT corner-driven design and verification. Presents Fast PVT, a novel, confidence-driven global optimization technique for PVT corner extraction and verification that is both rapid and reliable. Presents a visually-oriented overview of probability density functions, Monte Carlo sampling, and yield estimation. Describes a suite of methods used for 2-3 sigma statistical design and presents a novel sigma-driven corners flow, which is a fast, accurate, and scalable method suitable for 2-3 sigma design and verification. Describes and compares high-sigma design and verification techniques and presents a novel technique for high-sigma statistical corner extraction and verification, demonstrating its fast, accurate, scalable, and verifiable qualities across a variety of applications. Compares manual design and automated sizing and introduces an integrated approach to aid the sizing step in PVT, 3σ statistical and high-sigma statistical design.