Author Description

With the very large scale integrated circuits (VLSI) technologies scaling to deep submicron, power dissipation has become the most challenging design concerns. Floating-point algorithms are required to be implemented by fixed-point hardware for low power purposes. Identifying dynamic ranges of algorithm variables and further determining the bitwidth of fixed-point datapaths becomes very important. This dissertation is focused on the solutions of dynamic range estimation and related bitwidth determination. Karhunen Loeve expansion (KLE) and polynomial chaos expansion (PCE) based frameworks of dynamic range estimation are proposed for linear systems and nonlinear systems respectively. By these proposed approaches, both temporal and spatial correlation of system variables can be fully considered, and therefore, the estimation accuracy is significantly improved. The proposed PCE framework is the only approach to effectively handle nonlinear systems. The PCE based approaches are further extended to handle systems with control-flow structures (branches and loops). This extends the scope of dynamic range estimation to general applications for the first time. One novel approach is also proposed to construct PCE models from general input sample data or analytical models in other formats. No previous approach has this capability. Finally, noise estimation approaches for linear and nonlinear systems are presented to address the design scenario, where signal to noise ratio is specified as a design requirement. All the proposed approaches enjoy excellent accuracy and high speedup over profiling.